1. Field of Invention
The present invention deals with communication of instructions between input/output devices on a bus and memory.
2. Description of the Related Art
Devices attached to a computer system, e.g. disk drives, sound cards, modems, etc. are connected to the processor of the computer through a system bus. One type of bus is the Peripheral Component Interconnect (PCI) bus. Other types of buses include Industry Standard Architecture (ISA) and VESA Local Bus.
In a network environment, multiple computer systems are connected to each other via a network such as a LAN or WAN. Peripherals on one system frequently send data to remote memory located on another computer attached to the network. Typically, this data is spread across multiple data packets. These packets are transmitted in post-write format, i.e. in sequence without waiting for confirmation from the remote computer that the previous packets were received. For example, if data is spread across three packets, then the second and third packets are typically sent before any acknowledgement is received for the first packet. Sending multiple packets at the same time is designed to reduce delays caused by latency in the network and remote computer systems.
In order for the data to be effectively used by the receiving computer system, however, the ordering must be maintained across the data packets. Thus, if packets are received out of order, or if a packet is lost in transit, the whole stream is unusable. The easiest conventional solution to this problem is to not send a subsequent packet until receipt of the initial packet has been acknowledged. This solution is too expensive to be of practical use, however, because of the latency required for implementation.
Another conventional solution to the problem is to send the packets at once, and resend only those not received by the receiving computer. To do this, the packets contain sequence numbers. If the receiving computer does not receive one of the packets in the sequence, it sends a message, called a “retry request” or “nack,” to the sending computer, which can then resend the lost packet. The drawback to this solution is that the receiving computer must maintain a count of every packet in a sequence that has been received, and try to determine if any packets have been lost. When many computers are transmitting data packets to the same receiving computer at once, the receiving computer has to maintain this list for each sending computer. The consequence is that the sequence table in the receiving computer must either be very large, or else risk losing data. Neither is a preferable outcome, and thus the solution is not satisfactory.
Another conventional solution is to assign a number of “credits” to the transmitting computer system. The requester sends packets until the data size reaches the credit count. The receiver returns credits incrementally when buffer space becomes available for succeeding packets. The difficulty with this solution is once again the high cost of latency, here present in the set-up required to allocate credits. For example, if the data size is 4 kilobytes, latency becomes about 1-2 microseconds each time there is an input/output write.
Accordingly, what is needed is an efficient way of transmitting data from one bus to another across a network that does not suffer from long latency costs or have to repeatedly send data packets unnecessarily.